#!/bin/csh -f
#----------------------------------------------------------------------------
# This script compiles and simulates the RTL or gate-level code for the
# M8051W/EW Soft Core with the deliverable test bench m8051w_tb using
# a Modelsim simulator.
# This script is used for the compilation and simulation of the deliverable
# test program Selft.asm
#-----------------------------------------------------------------------------
#$Id: msim.scr,v 1.14 2002/01/09 15:58:55 rich Exp 
#$Log: msim.scr,v $
#Revision 1.14  2002/01/09
#Final testbench changes for version2
#
#Revision 1.13  2001/11/20
#First checkin of version 2 features and name change
#
#Revision 1.12  2001/10/16
#reference  listings relocated to tbfiles/ref
#
#Revision 1.11  2001/04/27
#update of the CVS repository
#
#Revision 1.10  2000/04/10
#script path fixes
#
#Revision 1.9  2000/03/28
#OCI update
#
#Revision 1.8  2000/03/06
#Revised configuration scheme
#
#Revision 1.7  2000/02/23
#First code freeze
#
#Revision 1.6  2000/02/21
#General tidy up
#
#Revision 1.5  2000/02/08
#*** empty log message ***
#
#Revision 1.3  2000/02/05
#Name change from m8051e to m8051ewarp
#

set SRC_DIR = "../rtl/mcu"
set TOP_DIR = "../rtl/top"
set ROM_DIR = "../testbench/mcu"
set TBS_DIR = "../testbench"
set NET_DIR = "../gates/synop"
set MSIM_DIR = work
set TEST = can_test
set CODE_DIR = "../assembler/testcase"
set REF_DIR = "../../tbfiles/ref"
set LIS_DIR = lis

set DEF_DIR = "../defines"

set CANDIR = "../rtl/peripherals/can"

set I2CDIR = "../rtl/peripherals/i2c"
set I2CTBDIR = "../testbench/i2c_slave_model.v"
 
set PWMDIR = "../rtl/peripherals/pwm"
 
set SPIDIR = "../rtl/peripherals/spi"
set SPITBDIR = "../testbench/spi_slave_model.v"

set	UARTDIR = "../rtl/peripherals/uart"

set DEFDIR = "../defines/"

foreach OPTION ($argv)
  switch ($OPTION)
    case -g:
      set gates
      breaksw
    case -c:
      set batch_mode
      breaksw
    case  -h:
      set help_mode
      breaksw   
    default:
      echo "${0}: Unknown option ${OPTION}"
      exit 1
  endsw
end
#------------------- Displays a Help Screen -----------------------------------
if ($?help_mode) then
        echo " Help Screen:"
        echo "            msim.scr       <- Compiles & Simulates the RTL in GUI Mode"
        echo "                                    "
        echo "            msim.scr -c    <- Compiles & Simulates the RTL in Batch Mode"
        echo "                                    "
        echo "            msim.scr -g    <- Compiles & Simulates the netlist in GUI Mode"
        echo "                                    "
        echo "            msim.scr -c -g <- Compiles & Simulates the netlist in Batch Mode"
        echo "                                    "
	echo "            msim.scr -h    <- This help screen"
	exit 1
endif
# Read the current testbench configuration
if ( { grep -c '^[ 	]*\`define[ 	][ 	]*IncludeOCI' \
  ${DEF_DIR}/m8051w_tb_cfg.v } ) then
  echo "Including OCI"
  set OCI
  else
     echo "Excluding OCI"
endif

#delete last test result
rm -f test_result

# Create a listing repository if it does not already exist
if (!(-d ${LIS_DIR})) mkdir ${LIS_DIR}

# Create a library
#if (-e ${MSIM_DIR}) rm -r ${MSIM_DIR}
#vlib ${MSIM_DIR}
# Create a library if it doesn't already exist
if (!(-e ${MSIM_DIR})) vlib ${MSIM_DIR}


if ($?gates) then
  # Compile the netlist
  vlog -incr -nologo ${NET_DIR}/m8051w.v
  if ($status) then
    echo ${0}: Netlist compilation failed
    exit 1
  endif
  # the sdf file has been disabled here
  #set VSIM_OPTIONS = "-t ps -L ver_lib"
  set VSIM_OPTIONS = "-t ps -L ver_lib -sdfmax /uRAP/uDUT=${NET_DIR}/m8051w.sdf"
  if ($?OCI) then
    # Compile the M8051W netlist
    vlog -incr -nologo ${NET_DIR}/oci.v
    if ($status) then
      echo ${0}: OCI compilation failed
      exit 1 
    endif
    set VSIM_OPTIONS = "${VSIM_OPTIONS} -sdfmax /uRAP/uOCI=${NET_DIR}/oci.sdf"
  endif
  set TYPE = gate
else
  # Compile the source RTL
  vlog -incr -nologo +incdir+${SRC_DIR}+${DEF_DIR} \
  			${SPIDIR}/*.v ${CANDIR}/*.v ${I2CDIR}/*.v ${PWMDIR}/*.v \
			${I2CTBDIR} ${SPITBDIR} ${UARTDIR}/*.v \
 			${SRC_DIR}/m3s001dy.v \
			${SRC_DIR}/m3s002dy.v ${SRC_DIR}/m3s003dy.v ${SRC_DIR}/m3s004dy.v \
            ${SRC_DIR}/m3s005dy.v ${SRC_DIR}/m3s006dy.v ${SRC_DIR}/m3s007dy.v \
            ${SRC_DIR}/m3s008dy.v ${SRC_DIR}/m3s011dy.v ${SRC_DIR}/m3s009dy.v \
            ${SRC_DIR}/m3s010dy.v ${SRC_DIR}/m3s012dy.v ${SRC_DIR}/m3s013dy.v \
            ${SRC_DIR}/m3s014dy.v ${SRC_DIR}/m3s015dy.v ${SRC_DIR}/m3s016dy.v \
            ${SRC_DIR}/m3s017dy.v ${SRC_DIR}/m3s018dy.v ${SRC_DIR}/m8051w.v \
			${TOP_DIR}/soc_esfr.v \
			${TOP_DIR}/soc_top.v \
		     	
			
  if ($status) then
    echo ${0}: RTL compilation failed
    exit 1
  endif
  if ($?OCI) then
    # Compile the OCI source RTL
    vlog -incr -nologo +incdir+${SRC_DIR} $SRC_DIR/trigger.v \
              $SRC_DIR/debug.v $SRC_DIR/jtag.v $SRC_DIR/trace.v $SRC_DIR/oci.v
    if ($status) then
      echo ${0}: OCI compilation failed
      exit 1
    endif
  endif
  set VSIM_OPTIONS = "-t ps"
  set TYPE = rtl
endif

# Compile RTL testbenches directly from source files.

# These are external models used to complete a discrete "40-pin part" model.
vlog -incr -nologo +incdir+${SRC_DIR}+${ROM_DIR} ${ROM_DIR}/pram.v ${ROM_DIR}/ram.v \
     ${ROM_DIR}/xram.v ${ROM_DIR}/cram.v ${ROM_DIR}/cpram.v ${ROM_DIR}/cxram.v \
     ${ROM_DIR}/wait_gen.v 
if ($status) then
  echo ${0}: Wrapper compilation failed
  exit 2
endif

#  This is the top level test bench providing external stimuli.
vlog -incr -nologo +incdir+${DEF_DIR} ${TBS_DIR}/top_tb.v
if ($status) then
  echo ${0}: Testbench compilation failed
  exit 3
endif

#  Set up program image file
rm -f program.rom
python hex2rom.py ${CODE_DIR}/${TEST}/${TEST}.hex
ln -s ${CODE_DIR}/${TEST}/${TEST}.rom program.rom
if (!(-r program.rom)) then
  echo ${0}: Failed to open program image program.rom
  exit 4
endif

#  Run the simulation

if (-e msim.log) rm -f msim.log
if (-e ${LIS_DIR}/${TEST}.${TYPE}.lis) rm -f ${LIS_DIR}/${TEST}.${TYPE}.lis
if (-e sim.lis) rm -f sim.lis


# Set simulator gui mode
if ($?batch_mode) then
  echo "Running the simulation in Batch mode"
  vsim m8051w_tb -novopt -c ${VSIM_OPTIONS} -l msim.log -do "run -all; quit"
else
  echo "Running the simulation in GUI mode"  
  vsim m8051w_tb -novopt ${VSIM_OPTIONS} -l msim.log -do "do top_wave.do; run -all" 
endif

grep "Error loading design" msim.log
if ( $status == '0' ) then
  echo "${0}: Simulation failed"
  exit 4
endif
grep "program test over" msim.log
if ( $status == '0') then
  echo "Simulation completed successfully"
else
  echo "ERROR: Simulation entered an error loop"  
endif
# Deal with the simulation listing
echo "You can find the simulation listings in the vhdl/sim/lis directory" 
mv msim.log ${LIS_DIR}/${TEST}.${TYPE}.log
mv sim.lis ${LIS_DIR}/${TEST}.${TYPE}.lis
cat test_result

